High-frequency amplifier

ABSTRACT

A high-frequency amplifying unit  2  in which a steep gain variation developed according to a change in the amplitude of input high-frequency signal is suppressed is provided. It amplifies an input high-frequency signal with a plurality of transistors  12 - 1  to  12 -N at the same time a measuring circuit  27  measures amplitude of the input high-frequency signal, and a bias control circuit  26  continuously controls a bias applied to each transistors  12 - 1  to  12 -N according to the value of amplitude measured by the measuring circuit  27.  Thus it is possible to suppress a steep gain variation produced according to a variation in the amplitude of input high-frequency signal.

BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] The present invention relates to a high-frequency amplifyingdevice which is used in, for example, a mobile communication terminal toamplify a high-frequency signal.

[0003] 2. Description of the Rior Art

[0004]FIG. 1 is a block diagram showing a configuration of conventionalhigh-frequency amplifying device described in, for example, “IntelligentRF Power Module Using Automatic Bias Control (ABC) System for PCS CDMAApplications” (Sato et al., IEEE MTT-S Int. Microwave Symp. Dig. p.p.201-204, 1998). In the figure, reference numeral 201 indicates an inputterminal, 202-1 indicates a first-stage transistor for amplifying ahigh-frequency signal, and 202-2 indicates a second-stage transistor foramplifying the high-frequency signal. 203-1 indicates a bias feedcircuit such as a distributed constant circuit, a resistor, an inductor,a capacitor or the like for biasing the input of transistor 202-1, and203-2 indicates a bias feed circuit for biasing the input of transistor202-2. 204-1 indicates a pull-up circuit provided on the output side oftransistor 202-1, 204-2 indicates a pull-up circuit provided on theoutput side of transistor 202-2, and 205 indicates an output terminal,respectively.

[0005] In addition, reference numeral 211 indicates a transistor fordetecting an input signal, 212 indicates a pull-up circuit on the outputside of transistor 211, and 213 indicates a comparator for comparing areference voltage generated by a reference voltage source 214 and avoltage of signal detected by the transistor 211. 214 indicates areference voltage source for generating a predetermined referencevoltage, and 215 indicates a variable voltage source for applying avoltage corresponding to the result of comparison by the comparator 213to each bias feed circuits 203-1 and 203-2.

[0006] The operation will next be explained.

[0007] A-high-frequency signal supplied via the input terminal 201 isamplified by the transistors 202-1 and 202-2 and the post-amplificationhigh-frequency signal is output through the output terminal 205.

[0008] On the other hand, the transistor 211 detects the high-frequencysignal supplied via the input terminal 201 and supplies a post-detectionsignal to the comparator 213. The comparator 213 compares a referencevoltage generated by the reference voltage source 214 and a voltage ofsignal detected by the transistor 211 and supplies a signal (e.g., asignal of 0 or 1) indicative of whether the voltage of post-detectionsignal is higher than the reference voltage, to a variable voltagesource 215. The variable voltage source 215 changes the voltage to applyto each bias feed circuits 203-1 and 203-2 according to whether or notthe voltage of input signal is higher than the reference voltage.

[0009] Thus the biases to be applied to the transistors 202-1 and 202-2are changed according to the voltage (power) of input signal to reducepower consumption at low output power.

[0010] However, because the conventional high-frequency amplifyingdevice is constructed as described above, it has been accompanied byproblems that a variation in gain at their changing is large and, forexample, further reduction in power consumption is difficult, since thebiases to be applied to the transistors are changed discontinuouslybased on whether or not the voltage of input signal is higher than thereference voltage. There was a possibility that when the variation ingain at the changing was large, a shift occurred in the phase of asignal, thus causing defective conditions upon detection. When a system,such as a W-CDMA (Wideband Code Division Multiple Access) system whichis placed under strict constraints on a gain fluctuation band width, isused in a communication apparatus or the like, it has been difficult tomeet such constraints when the gain variation at the changing is large.

[0011] The present invention has been made to solve the foregoingproblems. Therefore the present invention aims to provide ahigh-frequency amplifying device comprising a high-frequency amplifyingunit having a plurality of the amplifying elements for amplifying theinput high-frequency signal; a measuring circuit for measuring amplitudeof the input high-frequency signal; and a bias control circuit forcontinuously controlling a bias applied to each amplifying elementsaccording to value of the amplitude measured by the measuring circuit,whereby a steep gain variation developed according to a change in theamplitude of input high-frequency signal can be suppressed.

SUMMARY OF THE INVENTION

[0012] According to a first aspect of the present invention, ahigh-frequency amplifying device comprises: a high-frequency amplifyingunit having a plurality of the amplifying elements for amplifying theinput high-frequency signal; a measuring circuit for measuring amplitudeof the input high-frequency signal; and a bias control circuit forcontinuously controlling a bias applied to each amplifying elementsaccording to value of the amplitude measured by the measuring circuit.By this arrangement, an effect is obtained that a steep gain variationdeveloped according to a change in the amplitude of input high-frequencysignal can be suppressed. Further, another effect is obtained that thecircuit scale can be reduced since the bias control circuit collectivelycontrols bias applied to the plurality of amplifying elements.

[0013] According to a second aspect of the present invention, ahigh-frequency amplifying device in which bias control circuit has acurrent adding circuit for outputting a current having a valuecorresponding to the amplitude measured by the measuring circuit, and abias applying circuit for applying a bias corresponding to the sum ofcurrent output from the current adding circuit and a predeterminedreference current to the plurality of amplifying elements is provided.By this arrangement an effect is obtained that the bias can be reducedcontinuously and power consumption at low output power can be furtherreduced when the amplitude of input high-frequency signal becomes small.

[0014] According to a third aspect of the present invention, ahigh-frequency amplifying device in which bias control circuit has adetection adjusting circuit for setting value of a current conductedaccording to the amplitude of the high-frequency signal when themeasuring circuit measures the amplitude thereof is provided. By thisarrangement an effect is obtained that an operating condition for themeasuring circuit can be controlled and an adjustment of the device canbe carried out with ease.

[0015] According to a fourth aspect of the present invention, ahigh-frequency amplifying device in which current adding circuit has acurrent mirror circuit for allowing a current having a valuecorresponding to the amplitude measured by the measuring circuit toconduct into one end thereof and according to the current, outputtinganother current set based on a ratio between junction areas of thecurrent mirror circuit and a source voltage from the other end thereofis provided. By this arrangement an effect is obtained that thecharacteristic of current to the bias applying circuit with respect tothe amplitude of input high-frequency signal can easily be adjusted byadjusting the ratio between the junction areas of current mirror circuitand the source voltage thereof, and in its turn the bias applied to eachamplifying elements can be adjusted with ease.

[0016] According to a fifth aspect of the present invention, ahigh-frequency amplifying device in which bias applying circuit has aninternal amplifying element for conducting the current output from thecurrent adding circuit and the predetermined reference current, and theinternal amplifying element and the plurality of amplifying elements ofthe high-frequency amplifying unit constitute a current mirror circuitis provided.

[0017] According to a sixth aspect of the present invention, ahigh-frequency amplifying device in which bias control circuit has acurrent subtracting circuit for inputting thereto a current having avalue corresponding to the amplitude measured by the measuring circuit,and a bias applying circuit for supplying the current to the currentsubtracting circuit and applying a bias corresponding to a differencebetween a predetermined reference current and said current to theplurality of amplifying elements is provided. By this arrangement aneffect is obtained that it is possible to continuously increase the biaswhen the input high-frequency signal is reduced in amplitude, andthereby compensate for a gain reduction at low output power.

[0018] According to a seventh aspect of the present invention, ahigh-frequency amplifying device in which bias control circuit has adetection adjusting circuit for setting a value of current conductedaccording to the amplitude of high-frequency signal when the measuringcircuit measures the amplitude thereof is provided. By this arrangementan effect is obtained that the operating condition for measuring circuitcan be controlled, and hence an adjustment of the device can easily beperformed.

[0019] According to an eighth aspect of the present invention, ahigh-frequency amplifying device in which current subtracting circuithas a current mirror circuit for allowing a current having a valuecorresponding to the amplitude measured by the measuring circuit toconduct into one end thereof and according to the current, inputtinganother current set based on a ratio between junction areas of thecurrent mirror circuit and a source voltage from the other end thereofis provided. By this arrangement an effect is obtained that thecharacteristic of current from the bias applying circuit with respect tothe amplitude of input high-frequency signal can easily be adjusted byadjusting the ratio between the junction areas of current mirror circuitand the source voltage thereof, and in its turn the bias applied to eachamplifying elements can be adjusted with ease.

[0020] According to a ninth aspect of the present invention, ahigh-frequency amplifying device in which bias applying circuit has aninternal amplifying element for conducting the remaining currentobtained by subtracting the current supplied to the current subtractingcircuit from the predetermined reference current, and the internalamplifying element and the plurality of amplifying elements of thehigh-frequency amplifying unit constitute a current mirror circuit isprovided.

[0021] According to a tenth aspect of the present invention, ahigh-frequency amplifying device in which measuring circuit is connectedin parallel with the high-frequency amplifying unit is provided. By thisarrangement an effect is obtained that the amplitude of high-frequencysignal can be measured without degradation of the high-frequency signalsupplied to the high-frequency amplifying unit.

[0022] According to an eleventh aspect of the present invention, ahigh-frequency amplifying device in which measuring circuit, currentadding circuit and detection adjusting circuit are connected in parallelwith the high-frequency amplifying unit is provided. By this arrangementan effect is obtained that the measuring circuit, the detectionadjusting circuit and the current subtracting circuit can be implementedin a one-chip integrated circuit, thus it makes possible to reduce thescale and cost of the device.

[0023] According to a twelfth aspect of the present invention, ahigh-frequency amplifying device in which measuring circuit, currentsubtracting circuit and detection adjusting circuit are connected inparallel with high-frequency amplifying unit is provided. By thisarrangement an effect is obtained that the measuring circuit, thedetection adjusting circuit and the current subtracting circuit can beimplemented in a one-chip integrated circuit, thus it makes possible toreduce the scale and cost of the device.

[0024] According to a thirteenth aspect of the present invention, ahigh-frequency amplifying device in which measuring circuit has adetector circuit connected in series with the high-frequency amplifyingunit, for passing the high-frequency signal to the high-frequencyamplifying unit and detecting the high-frequency signal is provided. Bythis arrangement an effect is obtained that it is not necessary toadditionally provide a divider for allowing the high-frequency signal todivide into the measuring circuit and the high-frequency amplifyingunit, and hence a circuit scale can be reduced.

[0025] According to a fourteenth aspect of the present invention, ahigh-frequency amplifying device comprises: a high-frequency amplifyingunit having a plurality of the amplifying elements for amplifying theinput high-frequency signal; a measuring circuit for measuring theamplitude of input high-frequency signal; and a plurality of biascontrol circuits for respectively independently controlling continuouslybiases applied to the respective amplifying elements according to thevalue of amplitude measured by the measuring circuit. By thisarrangement an effect is obtained that the biases can independently beset according to the frequency characteristics and physicalcharacteristics of the respective amplifying elements, for example.

[0026] According to a fifteenth aspect of the present invention, ahigh-frequency amplifying device in which each bias control circuits hasa current adding circuit for outputting a current having a valuecorresponding to the amplitude measured by the measuring circuit, and abias applying circuit for applying a bias corresponding to the sum ofcurrent output from the current adding circuit and a predeterminedreference current to the each amplifying element is provided. By thisarrangement an effect is obtained that the power consumption at lowoutput power can be further reduced since the biases applied to therespective amplifying elements can be established independently.

[0027] According to a sixteenth aspect of the present invention, ahigh-frequency amplifying device in which each bias control circuit hasa current subtracting circuit for inputting thereto a current having avalue corresponding to the amplitude measured by the measuring circuit,and a bias applying circuit for supplying the current to the currentsubtracting circuit and applying a bias corresponding to the differencebetween a predetermined reference current and the current to the eachamplifying element is provided. By this arrangement an effect isobtained that the compensation for a gain reduction at low output powercan be carried out more suitably since the biases for the respectiveamplifying elements can beset independently.

[0028] According to a seventeenth aspect of the present invention, ahigh-frequency amplifying device in which each bias control circuit of apredetermined number of stages on the front side, of the plurality ofbias control circuits has a current subtracting circuit for inputtingthereto a current having a value corresponding to the amplitude measuredby the measuring circuit, and a bias applying circuit for supplying thecurrent to the current subtracting circuit and applying a biascorresponding to the difference between a predetermined referencecurrent and the supplied current to the each amplifying element, andeach remaining bias control circuits on the rear side has a currentadding circuit for outputting a current having a value corresponding tothe amplitude measured by the measuring circuit, and a bias applyingcircuit for applying a bias corresponding to the sum of current outputfrom the current adding circuit and a predetermined reference current tothe each amplifying element is provided. By this arrangement an effectis obtained that a reduction in distortion and a reduction in powerconsumption at low output power can be rendered compatible.

BRIEF DESCRIPTION OF THE DRAWINGS

[0029]FIG. 1 is a block diagram showing a configuration of conventionalhigh-frequency amplifying device;

[0030]FIG. 2 is a block diagram showing a configuration ofhigh-frequency amplifying device according to an embodiment 1 of thepresent invention;

[0031]FIG. 3 is a circuit diagram showing an example of configuration ofa detection adjusting circuit shown in FIG. 2;

[0032]FIG. 4 is a circuit diagram showing an example of configuration ofa current adding circuit shown in FIG. 2;

[0033]FIG. 5 is a circuit diagram showing an example of configuration ofa bias applying circuit shown in FIG. 2;

[0034]FIG. 6 is a block diagram showing a configuration ofhigh-frequency amplifying device according to an embodiment 2 of thepresent invention;

[0035]FIG. 7 is a circuit diagram showing configurations of a detectionadjusting circuit and a current subtracting circuit shown in FIG. 6;

[0036]FIG. 8 is a block diagram showing a configuration ofhigh-frequency amplifying device according to an embodiment 3 of thepresent invention;

[0037]FIG. 9 is a block diagram showing a configuration ofhigh-frequency amplifying device according to an embodiment 4 of thepresent invention;

[0038]FIG. 10 is a block diagram showing a configuration ofhigh-frequency amplifying device according to an embodiment 5 of thepresent invention;

[0039]FIG. 11 is a block diagram showing a configuration ofhigh-frequency amplifying device according to an embodiment 6 of thepresent invention; and

[0040]FIG. 12 is a circuit diagram showing an example of configurationof a detector circuit shown in FIG. 11.

DETAILED DESCRIPTION OF THE PREFERED EMBODIMENT

[0041] In order to describe the present invention in more details, bestmodes for carrying out the present invention will hereinafter bedescribed with reference to the accompanying drawings.

[0042] Embodiment 1

[0043]FIG. 2 is a block diagram showing a configuration ofhigh-frequency amplifying device according to an embodiment 1 of thepresent invention. In the figure, reference numeral 1 indicates an inputterminal, 2 indicates a high-frequency amplifying unit havingtransistors 12-1 to 12-N of N stages (where N≧2), and 3 indicates anoutput terminal.

[0044] In the high-frequency amplifying unit 2, reference numerals 11-1to 11-N respectively indicate matching circuits respectively provided atstages prior to the transistors, and 12-1 to 12-N, 12-1 to 12-Nrespectively indicate the transistors of N stages (amplifying elements)for amplifying a RF or high-frequency signal. 13-1 to 13-N respectivelyindicate pull-up circuits provided at the outputs of transistors 12-1 to12-N, and 14 indicates a matching circuit provided at a stage prior tothe output terminal 3, respectively.

[0045] Reference numeral 21 indicates a detector circuit such as a diodefor detecting an input signal, and 22 indicates a smoothing circuit suchas a capacitor for smoothing a post-detection signal. Incidentally, thedetector circuit 21 and the smoothing circuit 22 constitute a measuringcircuit 27 for measuring the amplitude of input signal.

[0046] Reference numeral 23 indicates a detection adjusting circuit foradjusting or regulating a current passing through the detector circuit21 and the smoothing circuit 22, 24 indicates a current adding circuitfor supplying a current of value corresponding to the amplitude of inputsignal to a bias applying circuit 25, based on the current adjusted bythe detection adjusting circuit 23, and 25 indicates a bias applyingcircuit for adding the current supplied from the current adding circuit24 to a reference current and applying a bias corresponding to thepost-addition current to the bases of transistors 12-1 to 12-N,respectively. Incidentally, the detection adjusting circuit 23, thecurrent adding circuit 24, and the bias applying circuit 25 constitute abias control circuit 26.

[0047] Examples of configurations of the detection adjusting circuit 23,the current adding circuit 24 and the bias applying circuit 25. at thetime that N type bipolar transistors are used as the transistors 12-1 to12-N, will now be shown. FIG. 3 is a circuit diagram showing an exampleof configuration of the detection adjusting circuit 23 shown in FIG. 2,FIG. 4 is a circuit diagram showing an example of configuration of thecurrent adding circuit 24, and FIG. 5 is a circuit diagram showing anexample of configuration of the bias applying circuit 25.

[0048] In the detection adjusting circuit 23 shown in FIG. 3, referencenumeral 31 indicates a variable resistor provided between an N typetransistor 32 and a smoothing circuit 22, 32 and 33 respectivelyindicate the N type transistors constituting a current mirror circuitwhose one end is connected to the variable resistor 31 and other end isconnected to the current adding circuit 24, and 34 indicates a powersupply connected to the collector and base of the N type transistor 32and the base of N type transistor 33. Incidentally, a current mirrorcircuit conducts a current through one end thereof and the other endthereof at the same ratio as a ratio between junction areas oftransistors, an N type transistor-based current mirror circuit allowscurrents to flow in from one end thereof and the other end thereof, anda P type transistor-based current mirror circuit allows currents to flowout from one end thereof and the other end thereof. The detector circuit21 comprises a diode D as shown in FIG. 3 by way of example, and thesmoothing circuit 22 is made up of a capacitor C as shown in FIG. 3 byway of example. Incidentally, the capacitance value of capacitor C isset according to a chip rate of the high-frequency signal, etc. Thecapacitor C serves so as to smooth a post-detection signal andsuppresses the flowing of high-frequency signal into the bias controlcircuit 26.

[0049] In the current adding circuit 24 shown in FIG. 4, referencenumerals 41 and 42 respectively indicate P type transistors thatconstitute a current mirror circuit whose one end is connected to thedetection adjusting circuit 23 and whose other end is connected to thebias applying circuit 25, and reference numeral 43 indicates a powersupply connected to the emitters of P type transistors 41 and 42.

[0050] In the bias applying circuit 25 shown in FIG. 5, referencenumeral 51 indicates an N type transistor (internal amplifying element)whose collector is connected to the current adding circuit 24 and whoseemitter is grounded, 52 indicates a resistor provided between thecollector of N type transistor 51 and a power supply 53, 53 indicatesthe power supply, 54 indicates an N type transistor whose base isconnected to the collector of N type transistor 51 and whose emitter isconnected to the base of N type transistor 51, 55 indicates a resistorprovided between the collector of N type transistor 54 and the powersupply 53, 56 indicates a capacitor, and 57 indicates an inductor whichis provided between the base of N type transistor 51 and the bases oftransistors 12-1 to 12-N of the high-frequency amplifying unit 2 tosuppress the flowing of a high-frequency signal from the high-frequencyamplifying unit 2, respectively. Incidentally, the N type transistor 51constitutes a current mirror circuit together with the N typetransistors 12-1 to 12-N of the high-frequency amplifying unit 2.

[0051] The operation will next be explained.

[0052] The high-frequency signal supplied via the input terminal 1 isamplified by the transistors 12-1 to 12-N of the high-frequencyamplifying unit 2 and the amplified high-frequency signal is outputthrough the output terminal 3.

[0053] On the other hand, the detector circuit 21 detects thehigh-frequency signal supplied via the input terminal 1 and supplies thepost-detection signal to the smoothing circuit 22. The smoothing circuit22 smoothes the signal. Incidentally, the detection adjusting circuit 23connected to the smoothing circuit 22 adjusts a current passing throughthe detector circuit 21 and the smoothing circuit 22. The current addingcircuit 24 supplies a current of value corresponding to the amplitude ofinput signal to the bias applying circuit 25, based on the currentadjusted by the detection adjusting circuit 23. The bias applyingcircuit 25 adds the current supplied from the current adding circuit 24to a reference current and applies a bias corresponding to the so-addedcurrent to the bases of transistors 12-l to 12-N. Thus when theamplitude of input signal increases, the post-addition current increasesand the bias applied to each bases of transistors 12-1 to 12-N becomeslarge. On the other hand, when the amplitude of input signal decreases,the post-addition current is reduced and the bias applied to each baseof transistors 12-1 to 12-N decreases.

[0054] A description will now be made of operation at the time that therespective parts are configured as shown in FIGS. 3 through 5.

[0055] First, the detector circuit 21 and the smoothing circuit 22extract the voltage amplitude of an input signal and allow a currentcorresponding to the voltage amplitude of input signal to conduct intothe N type transistor 32 of current mirror circuit, based on theresistance value of variable resistor 31 and the voltage of power supply34. Thus a current obtained by multiplying the current by a ratiobetween junction areas of the N type transistors 32 and 33 is allowed toconduct into the N type transistor 33 of current mirror circuit (seeFIG. 3).

[0056] The same current is caused to conduct even into the P typetransistor 41 of current mirror circuit in the current adding circuit24, which is connected to the N type transistor 33. Thus a currenthaving a value obtained by multiplying the current by a ratio betweenjunction areas of the P type transistors 41 and 42 is allowed to conductinto the P type transistor 42 of current mirror circuit (see FIG. 4).

[0057] In the bias applying circuit 25, a reference bias for the N typetransistor 51 is determined according to a voltage from the power supply53, a resistance value of the resistor 52 and an emitter-to-base voltageof the N type transistor 54 when no current is supplied from the currentadding circuit 24. A reference current corresponding to the referencebias serves so as to make continuity between the collector and emitter.When the current is supplied from the current adding circuit 24, thecurrent is added to the reference current, followed by flowing into thecollector of N type transistor 51 of the bias applying circuit 25. Thebias applied to the base of N type transistor 51 also varies accordingto the change in the emitter-to-collector current. Since the N typetransistor 51 constitutes the current mirror circuit together with thetransistors 12-1 to 12-N of high-frequency amplifying unit 2, the biasapplied to each bases of transistors 12-1 to 12-N of the high-frequencyamplifying unit 2 also changes in the same manner as described above(see FIG. 5).

[0058] Thus the detector circuit 21, the smoothing circuit 22, thedetection adjusting circuit 23, the current adding circuit 24 and thebias applying circuit 25 continuously adjust the bias for eachtransistors 12-1 to 12-N of high-frequency amplifying unit 2 accordingto the amplitude of input signal.

[0059] Thus according to the embodiment 1, an effect is obtained that asteep gain variation produced according to a change in the amplitude ofinput high-frequency signal can be suppressed, since the high-frequencyamplifying unit 2 having the plurality of transistors 12-1 to 12-N foramplifying the input high-frequency signal, the measuring circuit 27 formeasuring the amplitude of input high-frequency signal, and the biascontrol circuit 26 for continuously controlling the bias applied to eachtransistors 12-1 to 12-N according to the value of amplitude measured bythe measuring circuit 27 are provided.

[0060] According to the embodiment 1 as well, an effect is obtained thatthe circuit scale can be reduced since the bias control circuit 26collectively controls the bias applied to each plurality of transistors12-1 to 12-N.

[0061] Further according to the embodiment 1, an effect is obtained thatthe bias can be lowered continuously when the amplitude of inputhigh-frequency signal is reduced, thus it makes possible to furtherreduce power consumption at low output power since the bias controlcircuit 26 has the current adding circuit 24 for outputting the currenthaving a value corresponding to the amplitude measured by the measuringcircuit 27, and the bias applying circuit 25 for applying the biascorresponding to the sum of current from the current adding circuit 24and the predetermined reference current to each transistors 12-1 to12-N.

[0062] Furthermore according to the embodiment 1, an effect is obtainedthat an operating condition (operating point of the diode constitutingthe detector circuit 21) for the measuring circuit 27 can be controlledand hence an adjustment of the device can be easily performed since thebias control circuit 26 has the detection adjusting circuit 23 forsetting a value of current conducted or carried according to theamplitude of high-frequency signal when the measuring circuit 27measures the amplitude.

[0063] Still further according to the embodiment 1, an effect isobtained that the characteristic of current to the bias applying circuit25 with respect to the amplitude of input high-frequency signal caneasily be adjusted by adjusting the ratio between the junction areas ofcurrent mirror circuit and the source voltage thereof, and in its turnthe bias applied to each transistors 12-1 to 12-N can be adjusted withease since the current adding circuit 24 has the current mirror circuitfor allowing the current of value corresponding to the amplitudemeasured by the measuring circuit to conduct into one end thereof andoutputting the current set based on the ratio between the junction areasof current mirror circuit and the source voltage thereof from the otherend thereof according to the above current.

[0064] Still further according to the embodiment 1, an effect isobtained that the measuring circuit 27 is capable of measuring theamplitude of high-frequency signal without degradation of thehigh-frequency signal supplied to the high-frequency amplifying unit 2since the measuring circuit 27 is connected in parallel with thehigh-frequency amplifying unit 2.

[0065] Still further according to the embodiment 1, an effect isobtained that the measuring circuit 27, the detection adjusting circuit23 and the current adding circuit 24 can be implemented in a one-chipintegrated circuit, thus it makes possible to reduce the scale and costof the device since the measuring circuit 27, the detection adjustingcircuit 23 and the current adding circuit 24 are connected in parallelwith the high-frequency amplifying unit.

[0066] Embodiment 2

[0067]FIG. 6 is a block diagram showing a configuration ofhigh-frequency amplifying device according to an embodiment 2 of thepresent invention. In the figure, reference numeral 61 indicates adetection adjusting circuit for adjusting a current passing through adetector circuit 21 and a smoothing circuit 22, and 62 indicates acurrent subtracting circuit for causing a current having a valuecorresponding to the amplitude of an input signal to be supplied from abias applying circuit 25 based on the current adjusted by the detectionadjusting circuit 23. Incidentally, the detection adjusting circuit 61,the current subtracting circuit 62 and the bias applying circuit 25constitute a bias control circuit 63.

[0068] Incidentally, since other elements of structure in FIG. 6 aresimilar to those employed in the embodiment 1, description on them willbe omitted. However, the bias applying circuit 25 subtracts the currentsupplied to the current subtracting circuit 62 from a reference currentand applies a bias corresponding to the post-subtraction remainingcurrent to each bases of transistors 12-1 to 12-N.

[0069] An example illustrative of configurations of the detectionadjusting circuit 61 and the current subtracting circuit 62 where N typebipolar transistors are used as the transistors 12-1 to 12-N, are shownhereinafter. FIG. 7 is a circuit diagram showing the configurations ofdetection adjusting circuit 61 and the current subtracting circuit 62shown in FIG. 6. In the figure, reference numeral 71 indicates avariable resistor, and 72 indicates a power supply, respectively.Designated at numerals 81 and 82 are respectively N type transistorswhich constitute a current mirror circuit whose one end is connected tothe detection adjusting circuit 61 and whose other end is connected tothe bias applying circuit 25. Incidentally, the bias applying circuit 25in this case may make use of one shown in FIG. 5.

[0070] The operation will next be explained.

[0071] Since the high-frequency amplifying unit 2 is operated in amanner similar to the embodiment 1, the description thereof will beomitted.

[0072] The detection circuit 21 detects a high-frequency signal suppliedvia an input terminal 1 and supplies the post-detection signal to thesmoothing circuit 22. The smoothing circuit 22 smoothes the signal.Incidentally, the detection adjusting circuit 61 connected to thesmoothing circuit 22 adjusts a current passing through the detectorcircuit 21 and the smoothing circuit 22. The current subtracting circuit62 causes the bias applying circuit 25 to supply a current of valuecorresponding to the amplitude of input signal through based on thecurrent adjusted by the detection adjusting circuit 61. The biasapplying circuit 25 subtracts the current supplied to the currentsubtracting circuit 62 from a reference current and applies a biascorresponding to the so-subtracted remaining current to each bases oftransistors 12-1 to 12-N. Thus when the amplitude of input signalincreases, the post-subtraction remaining current decreases and the biasapplied to each bases of transistors 12-1 to 12-N is reduced. On theother hand, when the amplitude of input signal decreases, thepost-subtraction remaining current increases and the bias applied toeach bases of transistors 12-1 to 12-N becomes large.

[0073] A description will now be made for operation when the respectiveparts are configured as shown in FIGS. 5 and 7.

[0074] First, the detector circuit 21 and the smoothing circuit 22extract the voltage amplitude of an input signal and allow a currentcorresponding to the voltage amplitude of input signal to conduct intothe N type transistor 81 of current mirror circuit, based on theresistance value of variable resistor 71 and the voltage of power supply72. Thus a current obtained by multiplying the current by a ratiobetween junction areas of the N type transistors 81 and 82 is allowed toconduct into the N type transistor 82 of current mirror circuit (seeFIG. 7). At this time, the current which passes through the N typetransistor 82, is conducted from the bias applying circuit 25 to thecurrent subtracting circuit 62.

[0075] In the bias applying circuit 25, a reference bias for the N typetransistor 51 is determined according to a voltage from the power supply53, a resistance value of the resistor 52 and an emitter-to-base voltageof the N type transistor 54 when no current is supplied to the currentsubtracting circuit 62. A reference current corresponding to thereference bias serves so as to make continuity between the collector andemitter. When the current is supplied to the current subtracting circuit62, the current is subtracted from the reference current, and thereafterthe post-subtraction remaining current flows into the collector of Ntype transistor 51 of the bias applying circuit 25. The bias applied tothe base of N type transistor 51 also varies according to a change inthe emitter-to-collector current. Since the N type transistor 51constitutes the current mirror circuit together with the transistors12-1 to 12-N of high-frequency amplifying unit 2, the bias applied toeach bases of transistors 12-1 to 12-N of the high-frequency amplifyingunit 2 also changes in the same manner as described above (see FIG. 5).

[0076] Thus the detector circuit 21, the smoothing circuit 22, thedetection adjusting circuit 61, the current subtracting circuit 62 andthe bias applying circuit 25 continuously adjust the bias for eachtransistors 12-1 to 12-N of high-frequency amplifying unit 2 accordingto the amplitude of input signal.

[0077] Thus according to the embodiment 2, an effect is obtained that asteep gain variation produced according to a change in the amplitude ofinput high-frequency signal can be suppressed since the high-frequencyamplifying unit 2 having the plurality of transistors 12-1 to 12-N foramplifying the input high-frequency signal, the measuring circuit 27 formeasuring the amplitude of input high-frequency signal, and the biascontrol circuit 63 for continuously controlling the bias applied to eachtransistors 12-1 to 12-N according to the value of amplitude measured bythe measuring circuit 27 are provided.

[0078] According to the embodiment 2 as well, an effect is obtained thatthe circuit scale can be reduced since the bias control circuit 63collectively controls the bias applied to each plurality of transistors12-1 to 12-N.

[0079] Further according to the embodiment 2, an effect is obtained thatthe bias can be increased continuously when the amplitude of inputhigh-frequency signal is reduced, thus it makes possible to compensatefor a gain reduction at low output power since the bias control circuit63 has the current subtracting circuit 62 for inputting the currenthaving a value corresponding to the amplitude measured by the measuringcircuit 27, and the bias applying circuit 25 for supplying the currentto the current subtracting circuit and applying the bias correspondingto the difference between a predetermined reference current and thecurrent to a plurality of amplifying elements. That is to say, when itis necessary to compensate for a gain reduction at low output poweraccording to the type of device used in each transistors 12-1 to 12-N,the bias control circuit 63 is used, whereas when it is necessary toreduce power consumption at low output power, the bias control circuit26 is used.

[0080] Furthermore according to the embodiment 2, an effect is obtainedthat the operating condition (operating point of the diode constitutingthe detector circuit 21) for the measuring circuit 27 can be controlledand hence an adjustment of the device can be easily performed since thebias control circuit 63 has the detection adjusting circuit 61 forsetting a value of current conducted according to the amplitude ofhigh-frequency signal when the measuring circuit 27 measures theamplitude thereof.

[0081] Still further according to the embodiment 2, an effect isobtained that the characteristic of current from the bias applyingcircuit 25 with respect to the amplitude of input high-frequency signalcan easily be adjusted by setting the ratio between the junction areasof current mirror circuit and the source voltage thereof, and in itsturn the bias applied to each transistors 12-1 to 12-N can be adjustedwith ease since the current subtracting circuit 62 has the currentmirror circuit for allowing the current of value corresponding to theamplitude measured by the measuring circuit 27 to conduct into one endthereof and according to the current, causing another current set basedon the ratio between the junction areas of the current mirror circuitand the source voltage thereof to be inputted from the other endthereof.

[0082] Still further according to the embodiment 2, an effect isobtained that the measuring circuit 27 is capable of measuring theamplitude of high-frequency signal without degradation of thehigh-frequency signal supplied to the high-frequency amplifying unit 2since the measuring circuit 27 is connected in parallel with thehigh-frequency amplifying unit 2.

[0083] Still further according to the embodiment 2, an effect isobtained that the measuring circuit 27, the detection adjusting circuit61 and the current subtracting circuit 62 can be implemented in aone-chip integrated circuit, thus it makes possible to reduce the scaleand cost of the device since the measuring circuit 27, the detectionadjusting circuit 61 and the current subtracting circuit 62 areconnected in parallel with the high-frequency amplifying unit 2.

[0084] Embodiment 3

[0085]FIG. 8 is a block diagram showing a configuration ofhigh-frequency amplifying device according to an embodiment 3 of thepresent invention. In the high-frequency amplifying device according tothe embodiment 3, N pieces of bias control circuits 26 are respectivelyconnected to N pieces of transistors 12-1 to 12-N. Incidentally, sinceother configurations and configurations of the respective bias controlcircuits 63 in FIG. 8 are similar to those employed in the embodiment 1,description on them will be omitted.

[0086] The operation will next be explained.

[0087] In the high-frequency amplifying device according to theembodiment 3, the bias control circuits 26 provided at respective stagesindependently apply biases to respective transistors 12-i (where i=1, .. . , N) respectively. At this time, the respective biases are set inconsideration of, for example, the frequency characteristics andphysical characteristics of the respective transistors 12-i, etc.Incidentally, since the respective parts are similar in operation tothose employed in the embodiment 1, the description thereof will beomitted.

[0088] Thus according to the embodiment 3, an effect is obtained thatthe biases can be set independently according to the frequencycharacteristics and physical characteristics of the respectivetransistors 12-i since there are provided a high-frequency amplifyingunit 2 having the plurality of transistors 12-1 to 12-N for amplifyingan input high-frequency signal, a measuring circuit 27 for measuring theamplitude of input high-frequency signal, and a plurality of the biascontrol circuits 26 for respectively independently controlling thebiases applied to the respective transistors 12-i continuously accordingto the value of amplitude measured by the measuring circuit 27.

[0089] According to the embodiment 3 as well, since each bias controlcircuits 26 has a current adding circuit 24 for outputting a currentcorresponding to the amplitude measured by the measuring circuit 27, anda bias applying circuit 25 for applying a bias corresponding to the sumof current supplied from the current adding circuit 24 and apredetermined reference current to any of the transistors 12-1 to 12-N,an effect similar to the effect obtained in the embodiment 1 isobtained. Further, an effect is obtained that the biases applied to therespective transistors 12-i can be set independently and powerconsumption at low output power can be further reduced.

[0090] Embodiment 4

[0091]FIG. 9 is a block diagram showing a configuration ofhigh-frequency amplifying device according to an embodiment 4 of thepresent invention. In the high-frequency amplifying device according tothe embodiment 4, N bias control circuits 63 are respectively connectedto N transistors 12-1 to 12-N. Incidentally, since other configurationsand configurations of the respective bias control circuits 63 in FIG. 9are similar to those employed in the embodiment 2, description on themwill be omitted.

[0092] The operation will next be explained.

[0093] In the high-frequency amplifying device according to theembodiment 4, the bias control circuits 63 provided at respective stagesindependently apply biases to respective transistors 12-i (where i=1, .. . , N) respectively. At this time, the respective biases are set inconsideration of, for example, the frequency characteristics andphysical characteristics of the respective transistors 12-i, etc.Incidentally, since the respective parts are similar in operation tothose employed in the embodiment 2, the description thereof will beomitted.

[0094] Thus according to the embodiment 4, an effect is obtained thatthe biases can be set independently according to the frequencycharacteristics and physical characteristics of the respectivetransistors 12-i since there are provided a high-frequency amplifyingunit 2 having the plurality of transistors 12-1 to 12-N for amplifyingan input high-frequency signal, a measuring circuit 27 for measuring theamplitude of input high-frequency signal, and a plurality of the biascontrol circuits 63 for respectively independently controlling thebiases applied to the respective transistors 12-i continuously accordingto the value of amplitude measured by the measuring circuit 27.

[0095] According to the embodiment 4 as well, since each bias controlcircuits 63 has a current subtracting circuit 62 for inputting a currentcorresponding to the amplitude measured by the measuring circuit 27, anda bias applying circuit 25 for supplying the current to the currentsubtracting circuit 62 and applying a bias corresponding to thedifference between a predetermined reference current and the current toeach amplifying element, an effect similar to the effect obtained in theembodiment 2 is obtained. Further, an effect is obtained that the biasesapplied to the respective transistors 12-i can be set independently andthe compensation for a gain reduction at low output power can be carriedout more suitably.

[0096] Embodiment 5

[0097]FIG. 10 is a block diagram showing a configuration ofhigh-frequency amplifying device according to an embodiment 5 of thepresent invention. In the high-frequency amplifying device according tothe embodiment 5, bias control circuits 26 and bias control circuits 63equal to N in total are respectively connected to N transistors 12-1 to12-N. Incidentally, since other configurations and configurations of therespective bias control circuits 26 and 63 in FIG. 10 are similar tothose employed in the embodiment 1 or embodiment 2, description on themwill be omitted.

[0098] Incidentally, while the bias control circuit 63 is used in afirst stage and the bias control circuits 26 are used in an (N−1)thstage and an Nth stage in FIG. 10, the combination of these is notlimited to the above in particular. The bias control circuits 26 and thebias control circuits 63 may be used even by any number.

[0099] The operation will next be explained.

[0100] In the high-frequency amplifying device according to theembodiment 5, the bias control circuits 63 are provided for transistors12-1 to 12-M of predetermined M stages on the front side, and the biascontrol circuits 26 are provided for transistors 12-(M−1) to 12-N of theremaining (N-M) stages. Thus biases are independently applied to theircorresponding transistors 12-i (where i=1, . . . , N). At this time, therespective biases are set in consideration of, for example, thefrequency characteristics and physical characteristics of thetransistors 12-i, etc. Incidentally, since the respective parts aresimilar in operation to those employed in the embodiment 1 or embodiment2, the description thereof will be omitted Thus according to theembodiment 5, an effect is obtained that the transistors 12-1 to 12-Mused as drivers, for example, compensate for a gain reduction, and thetransistors 12-(M+1) to 12-N used as power amplifiers, for example,reduce power consumption, whereby a reduction in distortion and areduction in power consumption can be rendered compatible since thepredetermined number of stages of bias control circuits 63 on the frontside, of the plurality of bias control circuits 26 and 63 respectivelyhave current subtracting circuits 62 for respectively inputting theretoa current of value corresponding to amplitude measured by a measuringcircuit 27, and bias applying circuits 25 for respectively supplying thecurrent to the current subtracting circuits 62 and applying biases eachcorresponding to the difference between a predetermined referencecurrent and the current to their corresponding transistors 12-i (wherei=1, . . . , M), and the remaining bias control circuits 26 on the rearside respectively have current adding circuits 24 for respectivelyoutputting the current of value corresponding to the amplitude measuredby the measuring circuit 27, and bias applying circuits 25 forrespectively applying biases each corresponding to the sum of thecurrent supplied from each current adding circuit 24 and thepredetermined reference current to their corresponding transistors 12-i(where i=M+1, . . . , N)

[0101] Embodiment 6

[0102]FIG. 11 is a block diagram showing a configuration ofhigh-frequency amplifying device according to an embodiment 6 of thepresent invention. FIG. 12 is a circuit diagram showing an example ofconfiguration of a detector circuit 91 shown in FIG. 11. In the figure,reference numeral 91 indicates a detector circuit for passing ahigh-frequency signal to a high-frequency amplifying unit 2 anddetecting the high-frequency signal. In the detector circuit 91,reference numeral 101 indicates a capacitor connected to an inputterminal 1, for allowing the high-frequency signal to pass through andsuppressing a dc component or the like, 102 indicates a capacitorconnected to the high-frequency amplifying unit 2, for allowing thehigh-frequency signal to pass through and suppressing a dc component orthe like, 103 indicates a detecting diode, and 104 indicates an inductorfor suppressing a high-frequency component to the smoothing circuit 22.Incidentally, since other elements of structure shown in FIG. 11 arerespectively similar to those employed in the embodiment 1, thedescription thereof will be omitted.

[0103] The operation will next be explained.

[0104] The detector circuit 91 supplies the input high-frequency signalto the high-frequency amplifying unit 2 through the capacitors 101 and102. Incidentally, the high-frequency signal inputted thereto at thistime is cut or blocked off by the inductor 104 and is hence not suppliedto the smoothing circuit 22. On the other hand, since a component of theinput high-frequency signal, which is detected by the diode 103, is of alow frequency, it is supplied to the smoothing circuit 22 through theinductor 104. Incidentally, since other operations are similar to thosein the embodiment 1, the description thereof will be omitted.

[0105] Thus according to the embodiment 6, an effect is obtained that itis unnecessary to additionally provide a divider for allowing thehigh-frequency signal to divide into the measuring circuit 27 andhigh-frequency amplifying unit 2, thus it makes possible to reduce acircuit scale since the detector circuit 91 is connected in series withthe high-frequency amplifying unit 2 and passes the high-frequencysignal to the high-frequency amplifying unit 2, and detects thehigh-frequency signal.

[0106] Incidentally, while the embodiment 6 is one wherein the detectorcircuit 21 employed in the embodiment 1 is changed to the detectorcircuit 91, each detector circuits 21 employed in the embodiments 2through 5 may be changed to the detector circuit 91. Even in this case,an effect similar to the above is obtained.

[0107] Incidentally, while the above-described embodiment has explainedthe case in which N type bipolar transistors are used as amplifyingelements for the high-frequency amplifying unit 2 by way of example,other types of transistor or the like such as field effect transistormay be used as the amplifying elements for the high-frequency amplifyingunit 2. In such a case, however, internal circuit configurations of biascontrol circuits 26 and 63 must be modified correspondingly.

INDUSTRIAL APPLICABILITY

[0108] As described above, the present invention is suitable to use inamplification of the high-frequency signal in, for example, acommunication apparatus for transmitting and receiving a high-frequencysignal

What is claimed is:
 1. A high-frequency amplifying device fur amplifyinga high-frequency signal with a plurality of stages of amplifyingelements, comprising: a high-frequency amplifying unit having aplurality of the amplifying elements for amplifying the inputhigh-frequency signal; a measuring circuit for measuring amplitude ofsaid input high-frequency signal; and a bias control circuit forcontinuously controlling a bias applied to each of said amplifyingelements according to value of said amplitude measured by said measuringcircuit.
 2. The high-frequency amplifying device according to claim 1,wherein said bias control circuit has a current adding circuit foroutputting a current having a value corresponding to the amplitudemeasured by said measuring circuit, and a bias applying circuit forapplying a bias corresponding to the sum of current output from thecurrent adding circuit and a predetermined reference current to theplurality of amplifying elements.
 3. The high-frequency amplifyingdevice according to claim 2, wherein said bias control circuit has adetection adjusting circuit for setting value of a current conductedaccording to said amplitude of the high-frequency signal when saidmeasuring circuit measures the amplitude thereof.
 4. The high-frequencyamplifying device according to claim 2, wherein said current addingcircuit has a current mirror circuit for allowing a current having avalue corresponding to the amplitude measured by said measuring circuitto conduct into one end thereof and according to the current, outputtinganother current set based on a ratio between junction areas of thecurrent mirror circuit and a source voltage from the other end thereof.5. The high-frequency amplifying device according to claim 2, whereinsaid bias applying circuit has an internal amplifying element forconducting the current output from the current adding circuit and thepredetermined reference current, and said internal amplifying elementand the plurality of amplifying elements of said high-frequencyamplifying unit constitute a current mirror circuit.
 6. Thehigh-frequency amplifying device according to claim 1, wherein said biascontrol circuit has a current subtracting circuit for inputting theretoa current having a value corresponding to the amplitude measured by saidmeasuring circuit, and a bias applying circuit for supplying the currentto the current subtracting circuit and applying a bias corresponding toa difference between a predetermined reference current and said currentto the plurality of amplifying elements.
 7. The high-frequencyamplifying device according to claim 6, wherein said bias controlcircuit has a detection adjusting circuit for setting a value of currentconducted according to the amplitude of high-frequency signal when saidmeasuring circuit measures the amplitude thereof.
 8. The high-frequencyamplifying device according to claim 6, wherein said current subtractingcircuit has a current mirror circuit for allowing a current having avalue corresponding to the amplitude measured by said measuring circuitto conduct into one end thereof and according to the current, inputtinganother current set based on a ratio between junction areas of thecurrent mirror circuit and a source voltage from the other end thereof.9. The high-frequency amplifying device according to claim 6, whereinsaid bias applying circuit has an internal amplifying element forconducting the remaining current obtained by subtracting the currentsupplied to the current subtracting circuit from the predeterminedreference current, and the internal amplifying element and the pluralityof amplifying elements of said high-frequency amplifying unit constitutea current mirror circuit.
 10. The high-frequency amplifying deviceaccording to claim 1, wherein said measuring circuit is connected inparallel with said high-frequency amplifying unit.
 11. Thehigh-frequency amplifying device according to claim 3, wherein saidmeasuring circuit, said current adding circuit and said detectionadjusting circuit are connected in parallel with said high-frequencyamplifying unit.
 12. The high-frequency amplifying device according toclaim 7, wherein said measuring circuit, said current subtractingcircuit and said detection adjusting circuit are connected in parallelwith said high-frequency amplifying unit.
 13. The high-frequencyamplifying device according to claim 1, wherein said measuring circuithas a detector circuit connected in series with said high-frequencyamplifying unit, for passing the high-frequency signal to saidhigh-frequency amplifying unit and detecting the high-frequency signal.14. A high-frequency amplifying device for amplifying a high-frequencysignal with a plurality of stages of amplifying elements, comprising: ahigh-frequency amplifying unit having a plurality of the amplifyingelements for amplifying the input high-frequency signal; a measuringcircuit for measuring the amplitude of input high-frequency signal; anda plurality of bias control circuits for respectively independentlycontrolling continuously biases applied to the respective amplifyingelements according to the value of amplitude measured by said measuringcircuit.
 15. The high-frequency amplifying device according to claim 14,wherein each of said bias control circuits has a current adding circuitfor outputting a current having a value corresponding to the 1amplitudemeasured by said measuring circuit, and a bias applying circuit forapplying a bias corresponding to the sum of current output from thecurrent adding circuit and a predetermined reference current to saideach amplifying element.
 16. The high-frequency amplifying deviceaccording to claim 14, wherein each of said bias control circuit has acurrent subtracting circuit for inputting thereto a current having avalue corresponding to the amplitude measured by said measuring circuit,and a bias applying circuit for supplying the current to said currentsubtracting circuit and applying a bias corresponding to the differencebetween a predetermined reference current and the current to said eachamplifying element.
 17. The high-frequency amplifying device accordingto claim 14, wherein each of said bias control circuit of apredetermined number of stages on the front side, of said plurality ofbias control circuits has a current subtracting circuit for inputtingthereto a current having a value corresponding to the amplitude measuredby said measuring circuit, and a bias applying circuit for supplying thecurrent to the current subtracting circuit and applying a biascorresponding to the difference between a predetermined referencecurrent and the supplied current to said each amplifying element, andeach of said remaining bias control circuits on the rear side has acurrent adding circuit for outputting a current having a valuecorresponding to the amplitude measured by said measuring circuit, and abias applying circuit for applying a bias corresponding to the sum ofcurrent output from the current adding circuit and a predeterminedreference current to said each amplifying element.